FPGA Project: CNN Accelerator for Digit Recognition

About this course

Do you want to learn AI acceleration on FPGA?This project-based online course offers practical insights into designing AI accelerators, specifically a CNN algorithm for handwritten digit classification. The focus of the course is on the system design level on how to integrate a CNN module (written in Verilog RTL) with the application processor running Linux. The final result of this project is a web application for taking a handwritten digit and then sending this data to be processed with the CNN accelerator on the FPGA. On average, a speedup factor of 12x is achieved by using this accelerator compared to the CPU.Note:This course is not intended for absolute beginners in FPGA development. A basic understanding of FPGA design using Zynq and the PYNQ framework is expected before enrolling, as these fundamentals will not be covered. Familiarity with Verilog and Python is also required.Vivado 2022.1 and the Xilinx Kria KV260 board are used in this course, but the concepts are not limited to these tools or platforms. You can follow along using other versions of Vivado or different FPGA boards as well.What is CNN?A Convolutional Neural Network (CNN) is a type of deep learning model particularly well-suited for processing data with a grid-like structure, such as images. It works by automatically learning spatial hierarchies of features through layers that perform convolutions—mathematical operations that extract features like edges, textures, and shapes from the input data. These layers are typically followed by pooling layers, which reduce the spatial dimensions to make computation more efficient and prevent overfitting. The final layers are usually fully connected and perform